Nexii IT Labs
Emulation Engineer


Experience: 5-10 Years
Openings: 3
Key Skills:   #Palladium
Job Description

The candidate should have a thorough knowledge of Cadence Palladium tool flow. He should have a prior experience of validating designs using Palladium.

Eligibility Criteria

  • Knowledge of Verilog, System Verilog
  • Integration with Palladium speed bridges
  • Hands on working knowledge of SOC
  • Knowledge of Industry standard protocols like PCIe, USB, SATA, SPI, QSPI, I2C, RGMII, Display Port
  • Working knowledge of AXI4 and ARM processors
  • Very good debugging skills
  • Working knowledge of Xilinx tools and creating Vivado IPI designs
  • Hands on expertise in automation & regression framework
  • Expertise in scripting like Perl, TCL & Python

About Company

Posted on:  5 July 2018
Category:  Electronics
Views:  654
Recruiter last login:  6 July 2018